[VerifToSMT] Keep assumptions asserted across BMC timesteps#10788
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[VerifToSMT] Keep assumptions asserted across BMC timesteps#10788leizaf wants to merge 1 commit into
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The per-iteration pop/push in the BMC loop discarded every assertion from the previous timestep, including smt.asserts lowered from verif.assume. Checks at step i thus ignored assumptions from steps 0..i-1, yielding spurious counterexamples.
Restructure the scoping: the circuit function now asserts assumptions and definitions at the enclosing assertion level, opens a scope (push) at the end of its body, and asserts only the negated properties inside it; the loop pops that scope after each smt.check. Constraints now accumulate monotonically while property assertions stay per-step.
Assisted-by: Claude:Fable-5