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1. Photonic-Logic-Chip- Photonic-Logic-Chip- Public

   Photonic Logic Chip — 28 verified claims, 5.289mW@50GHz, no silicon required. Phase-encoded optical computation. DOI: 10.5281/zenodo.19801651

   HTML

2. Visibility-State-Computing Visibility-State-Computing Public

3. bitstar-photon-network bitstar-photon-network Public

   BitStar Photon Network Architecture

4. PEOS PEOS Public

   Python

5. CSL-LLM-Architecture CSL-LLM-Architecture Public

   Description: The official specification for Chip Simulation-to-Tapeout Large Language Model (CSL-LLM). Enabling physical sovereignty and hardware self-healing for 3nm/2nm nodes via the CTC System.

   Verilog 1