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Converting Uint32 signal output to BigInt

Status: Open.

#329 In freechipsproject/chisel-testers;

· mihirc-github opened on Jun 28, 2023

Inconsistence between VCD and log

Status: Open.

#305 In freechipsproject/chisel-testers;

· phhorrein opened on Dec 11, 2020

g++ compile error while adding --trace-fst to verilator options

Status: Open.

#292 In freechipsproject/chisel-testers;

· hukangha opened on Jun 28, 2020

Clock is initialized at 1 instead of 0

enhancement

Status: Open.

#280 In freechipsproject/chisel-testers;

· johnsbrew opened on Jan 23, 2020

should work with verilator *** FAILED ***

Status: Open.

#263 In freechipsproject/chisel-testers;

· medabme opened on Sep 27, 2019

have plan to port UVM into chisel test

Status: Open.

#262 In freechipsproject/chisel-testers;

· lenged opened on Sep 25, 2019

Support CXXFLAGS, LDFLAGS environment variables

Status: Open.

#244 In freechipsproject/chisel-testers;

· ucbjrl opened on May 3, 2019

Half Stepping

Status: Open.

#234 In freechipsproject/chisel-testers;

· grebe opened on Mar 7, 2019

Can't poke memory

Status: Open.

#229 In freechipsproject/chisel-testers;

· immesys opened on Dec 29, 2018

pokeAt with SyncReadMem

Status: Open.

#228 In freechipsproject/chisel-testers;

· immesys opened on Dec 29, 2018

Choose specific options based on the value of firrtlOptions.compilerName.

Status: Open.

#216 In freechipsproject/chisel-testers;

· ucbjrl opened on Oct 29, 2018

PeekPokeTester uses IndexedSeq

Status: Open.

#215 In freechipsproject/chisel-testers;

· grebe opened on Oct 24, 2018