Avoid division by zero and clock overflow in utilisation rate#478
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rocker-zhang wants to merge 1 commit into
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Avoid division by zero and clock overflow in utilisation rate#478rocker-zhang wants to merge 1 commit into
rocker-zhang wants to merge 1 commit into
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gpuinfo_refresh_utilisation_rate() derives GPU usage from drm-cycles and drm-maxfreq and is used by the panfrost and panthor backends. When a backend does not report drm-maxfreq, gpu_clock_speed_max stays 0, so max_freq_hz is 0 and the rate division has a zero denominator. The double division yields infinity and casting that to unsigned int is undefined behaviour. A zero sample delta or a reported engine_count of 0 produce the same zero denominator. Return early when the denominator would be zero, leaving gpu_util_rate unset so the UI shows N/A, matching the existing early return for a zero cycle count. gpu_clock_speed_max (MHz, unsigned int) was also multiplied by 1000000 in unsigned int arithmetic before being widened to the uint64_t max_freq_hz, which overflows above ~4295 MHz. Cast to uint64_t before multiplying.
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gpuinfo_refresh_utilisation_rate()derives GPU utilisation fromdrm-cycles and drm-maxfreq, and is used by the panfrost and panthor
backends. There are two problems in the same computation.
When the fdinfo has no drm-maxfreq key,
gpu_clock_speed_maxstays 0, somax_freq_hzis 0 and the utilisation division has a zero denominator.The double division yields infinity and the subsequent cast to
unsigned intis undefined behaviour. A zero sample delta or a reportedengine_countof 0 hit the same zero denominator. The fix returns earlywhen the denominator would be zero, which leaves
gpu_util_rateunset sothe UI reports N/A rather than a bogus value, matching the existing
if (!gfx_total_process_cycles) return;guard above it.gpu_clock_speed_maxis anunsigned intin MHz; multiplying by 1000000in
unsigned intarithmetic overflows above ~4295 MHz before the resultis stored in the
uint64_t max_freq_hz. Casting touint64_tfirst keepsthe frequency correct (a 5000 MHz clock gave 705032704 Hz before, and
5000000000 Hz after).
Validation: under UBSan, the zero-frequency case reported
extract_gpuinfo.c: runtime error: division by zerobefore the guard andreturns cleanly after; a 5000 MHz clock with 2.5e9 cycles over 1 s now
yields 50% (it clamped to 100% before the cast). Built clean on x86_64
(all backends) and arm64, and the gtest suite passes.