This repository compares arbitration strategies across scalable core counts:
- drra: Dynamic round-robin arbiter dataset
- fixed_priority: Fixed-priority arbiter
- matrix: Matrix-based round-robin arbiter
- round_robin: RR variants (RRA modulo, RRA_RPR, DRRA)
- rpr: Rotate-priority-rotate variant
- tdm_arbiter: Weighted/TDM-style arbiter
Core sizes analyzed: N = 4, 8, 16, 32, 64, 128.
- Makefile: root automation entry points
- run_all_sims.bat: run simulation batches from Windows
- analysis/: end-to-end parsing, metrics, EDA, and plotting pipeline
- docs/: summary reports and notes
- fixed_priority/: fixed-priority RTL, testbench, simulation artifacts
- matrix/: matrix arbiter RTL, testbench, simulation artifacts
- RoundRobinArbiter/: RR family variants (DRRA, RRA_RPR, modulo logic)
- TDM_Arbiter/: TDM-style arbiter RTL, testbench, simulation artifacts
- vivado/: synthesis TCL scripts and generated report directories
This project was completed in the following order:
- RTL design and coding of each arbiter module.
- Testbench development and functional verification for each module.
- Multi-N waveform simulation and VCD collection.
- CSV parsing, metric computation, EDA checks, and behavior validation.
- Vivado synthesis report generation and HW metric comparison.
- Complete RTL coding and testbench verification for each arbiter.
- Generate VCD waveforms for all arbiters and N values.
- See fixed_priority/, matrix/, RoundRobinArbiter/, TDM_Arbiter/ for simulation commands
- Store VCDs in analysis/input_vcd/{arbiter}/N{N}/.
- Parse waveforms, compute metrics, validate behavior.
- See analysis/README.md for full pipeline
- Generate plots comparing all arbiters across metrics.
Run full simulation + analysis on Windows:
run_all_sims.batRun analysis only (from project root):
cd analysis
python main.pySee analysis/README.md for detailed steps.
All metrics are computed after uniform downsampling so each arbiter at a given N uses the same number of rows.
Uniform datapoints per N:
- For each N, find minimum row count among arbiters.
- Use that count for every arbiter at that N.
Current minimum rows used:
| N | Min rows used |
|---|---|
| 4 | 954 |
| 8 | 4314 |
| 16 | 3810 |
| 32 | 6114 |
| 64 | 10722 |
| 128 | 19938 |
Throughput:
- granted_cycles / total_cycles
Fairness (Jain fairness index over grant distribution by requester):
where
Latency (request-level queue latency):
- Each cycle with req[i]=1 increments pending queue for requester i.
- A valid one-hot grant for requester i serves one pending request.
- Per-request latency is pending age at service; reported latency is mean over served requests.
- curr_req and grant are forward-filled/back-filled per (arbiter, N).
- Rows still missing after fill are dropped.
- Invalid grants (non-zero and non-one-hot) are counted in EDA outputs.
- Sparse metric gaps are interpolated per arbiter and then ffill/bfill.
EDA outputs:
- analysis/parsed_csv/eda/data_quality_summary.csv
- analysis/parsed_csv/eda/group_summary.csv
- analysis/parsed_csv/raw_signals/all_data.csv
- analysis/parsed_csv/raw_signals/uniform_data.csv
- analysis/parsed_csv/metrics/all_metrics.csv
- analysis/parsed_csv/hw_metrics/all_hw.csv
- analysis/parsed_csv/final_comparison.csv
- analysis/plots/*.png
Vivado reports are generated into:
- vivado/reports/{arbiter}/N{N}/utilization.rpt
- vivado/reports/{arbiter}/N{N}/power.rpt
- vivado/reports/{arbiter}/N{N}/timing.rpt
Parsed hardware metrics:
- LUTs (area)
- Power (W)
- WNS (ns)
- All requested missing reports were generated except
matrix/N128. matrix/N128is intentionally omitted in current HW comparison because Vivado crashes during synthesis withEXCEPTION_ACCESS_VIOLATIONin this environment.- Crash artifacts recorded in hs_err_pid4784.log and hs_err_pid4784.dmp.
See vivado/README.md for Vivado automation details.
| Arbiter | N4 | N8 | N16 | N32 | N64 | N128 |
|---|---|---|---|---|---|---|
| drra | 0.985 | 0.988 | 0.993 | 0.988 | 0.986 | 0.982 |
| fixed_priority | 0.695 | 0.380 | 0.207 | 0.115 | 0.059 | 0.032 |
| matrix | 0.849 | 0.530 | 0.402 | 0.190 | 0.152 | 0.099 |
| round_robin | 0.994 | 0.994 | 0.957 | 0.950 | 0.938 | 0.954 |
| rpr | 0.986 | 0.988 | 0.969 | 0.959 | 0.968 | 0.971 |
| tdm_arbiter | 0.984 | 0.968 | 0.968 | 0.940 | 0.951 | 0.898 |
| Arbiter | N64 LUTs | N64 Power (W) | N64 WNS (ns) | N128 LUTs | N128 Power (W) | N128 WNS (ns) |
|---|---|---|---|---|---|---|
| drra | 22 | 0.069 | 6.346 | 40 | 0.069 | 5.907 |
| fixed_priority | 52 | 0.069 | NA | 101 | 0.070 | NA |
| matrix | 6517 | 0.104 | 3.902 | NA | NA | NA |
| rpr | 3878 | 0.086 | -2.131 | 12463 | 0.186 | -341.995 |
| tdm_arbiter | 2089 | 0.113 | 5.958 | 4572 | 0.161 | 5.958 |
- Fixed-priority remains area-efficient, but fairness drops sharply with N, indicating starvation risk under sustained contention.
- DRRA and RPR keep fairness near 1.0 across all N and preserve high throughput at larger N.
- Matrix remains throughput-strong but fairness degrades with scale, and matrix N128 HW data is absent due Vivado crash.
- TDM keeps fairness high in this workload and now has complete HW coverage at N32 and N64.
- Plot overlap for close curves is now mitigated by consistent marker/linestyle mapping and small per-arbiter x-offsets to improve readability.
Observed trends are consistent with common scheduler behavior from standard references:
- Fixed priority can starve lower-priority requesters under persistent high-priority demand.
- Round-robin families are generally starvation-free and improve fairness.
- Weighted round-robin / TDMA family allocates service proportionally or by slot pattern.
Reference URLs used during validation:
- https://en.wikipedia.org/wiki/Round-robin_scheduling
- https://en.wikipedia.org/wiki/Weighted_round_robin
- https://en.wikipedia.org/wiki/Fixed-priority_pre-emptive_scheduling
- https://en.wikipedia.org/wiki/Time-division_multiple_access
Jump to an arbiter README:
Analysis and metrics: