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cross-rvv-arch.yml
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fix: route avx512vl_128 FMA ops through fma3<avx2_128> RISC-V RVV cross-compilation build (qemu 11) #131: Commit 122d083 pushed by serge-sans-paille
5m 22s master
master
5m 22s
feat: masked load/store capability traits + AVX integer masked memory RISC-V RVV cross-compilation build (qemu 11) #130: Commit 801631c pushed by DiamonDinoia
26m 19s master
master
26m 19s
Without a 32/64-bit avx512f transpose specialization, batch<float>/<d… RISC-V RVV cross-compilation build (qemu 11) #129: Commit f320683 pushed by serge-sans-paille
14m 6s master
master
14m 6s
Add an explicit SSE2 path for batch_bool_constant masks where the three RISC-V RVV cross-compilation build (qemu 11) #128: Commit 92ca962 pushed by serge-sans-paille
7m 30s master
master
7m 30s
perf(avx512f): single vpermt2 for zip_lo/zip_hi RISC-V RVV cross-compilation build (qemu 11) #127: Commit 8b12d38 pushed by DiamonDinoia
19m 16s master
master
19m 16s
Add an explicit SSE2 path for batch_bool_constant masks where the three RISC-V RVV cross-compilation build (qemu 11) #126: Pull request #1372 synchronize by DiamonDinoia
24m 25s DiamonDinoia:sse2-masked-load-3of4
DiamonDinoia:sse2-masked-load-3of4
24m 25s
Add an explicit SSE2 path for batch_bool_constant masks where the three RISC-V RVV cross-compilation build (qemu 11) #125: Pull request #1372 opened by DiamonDinoia
41m 56s DiamonDinoia:sse2-masked-load-3of4
DiamonDinoia:sse2-masked-load-3of4
41m 56s
perf(avx512f): vectorize 16x16 float / 8x8 double transpose RISC-V RVV cross-compilation build (qemu 11) #124: Pull request #1371 opened by DiamonDinoia
15m 44s DiamonDinoia:avx512-transpose
DiamonDinoia:avx512-transpose
15m 44s
perf(avx512f): single vpermt2 for zip_lo/zip_hi RISC-V RVV cross-compilation build (qemu 11) #123: Pull request #1370 opened by DiamonDinoia
26m 21s DiamonDinoia:avx512-zip-permutex2var
DiamonDinoia:avx512-zip-permutex2var
26m 21s
fix: route avx512vl_128 FMA ops through fma3<avx2_128> RISC-V RVV cross-compilation build (qemu 11) #122: Pull request #1369 synchronize by DiamonDinoia
21m 8s DiamonDinoia:fix/avx512vl_128-fma3
DiamonDinoia:fix/avx512vl_128-fma3
21m 8s
feat: add runtime batch_bool mask overloads for load_masked/store_masked RISC-V RVV cross-compilation build (qemu 11) #121: Pull request #1332 synchronize by DiamonDinoia
31m 37s DiamonDinoia:feat/dynamic-masks
DiamonDinoia:feat/dynamic-masks
31m 37s
fix: route avx512vl_128 FMA ops through fma3<avx2_128> RISC-V RVV cross-compilation build (qemu 11) #120: Pull request #1369 synchronize by DiamonDinoia
17m 19s DiamonDinoia:fix/avx512vl_128-fma3
DiamonDinoia:fix/avx512vl_128-fma3
17m 19s
fix: route avx512vl_128 FMA ops through fma3<avx2_128> RISC-V RVV cross-compilation build (qemu 11) #119: Pull request #1369 opened by DiamonDinoia
7m 3s DiamonDinoia:fix/avx512vl_128-fma3
DiamonDinoia:fix/avx512vl_128-fma3
7m 3s
Add CMakePresets for target micro arch RISC-V RVV cross-compilation build (qemu 11) #118: Pull request #1348 synchronize by AntoinePrv
12m 2s AntoinePrv:cmake-presets
AntoinePrv:cmake-presets
12m 2s
Fix avx512vl_{128,256} correctness bugs + CI default-arch typo (#1357) RISC-V RVV cross-compilation build (qemu 11) #117: Commit e79f9d3 pushed by JohanMabille
11m 12s master
master
11m 12s
fix: route avxvnni FMA ops through fma3<avx2> kernels (#1368) RISC-V RVV cross-compilation build (qemu 11) #116: Commit 0929f1a pushed by JohanMabille
2m 10s master
master
2m 10s
feat: add runtime batch_bool mask overloads for load_masked/store_masked RISC-V RVV cross-compilation build (qemu 11) #115: Pull request #1332 synchronize by DiamonDinoia
14m 12s DiamonDinoia:feat/dynamic-masks
DiamonDinoia:feat/dynamic-masks
14m 12s
fix: route avxvnni FMA ops through fma3<avx2> kernels RISC-V RVV cross-compilation build (qemu 11) #114: Pull request #1368 synchronize by DiamonDinoia
11m 4s DiamonDinoia:fix/avxvnni-fma3-dispatch
DiamonDinoia:fix/avxvnni-fma3-dispatch
11m 4s
fix: route avxvnni FMA ops through fma3<avx2> kernels RISC-V RVV cross-compilation build (qemu 11) #113: Pull request #1368 synchronize by DiamonDinoia
4m 57s DiamonDinoia:fix/avxvnni-fma3-dispatch
DiamonDinoia:fix/avxvnni-fma3-dispatch
4m 57s
fix: route avxvnni FMA ops through fma3<avx2> kernels RISC-V RVV cross-compilation build (qemu 11) #112: Pull request #1368 synchronize by DiamonDinoia
7m 13s DiamonDinoia:fix/avxvnni-fma3-dispatch
DiamonDinoia:fix/avxvnni-fma3-dispatch
7m 13s
fix: route avxvnni FMA ops through fma3<avx2> kernels RISC-V RVV cross-compilation build (qemu 11) #111: Pull request #1368 opened by DiamonDinoia
22m 33s DiamonDinoia:fix/avxvnni-fma3-dispatch
DiamonDinoia:fix/avxvnni-fma3-dispatch
22m 33s
feat: fused mul_hilo for 64-bit batches (shared 32x32->64 partials) RISC-V RVV cross-compilation build (qemu 11) #110: Commit 5d2490f pushed by serge-sans-paille
20m 26s master
master
20m 26s
feat: fused mul_hilo for 64-bit batches (shared 32x32->64 partials) RISC-V RVV cross-compilation build (qemu 11) #109: Pull request #1367 opened by DiamonDinoia
22m 8s DiamonDinoia:fused-mul-hilo
DiamonDinoia:fused-mul-hilo
22m 8s
feat: add runtime batch_bool mask overloads for load_masked/store_masked RISC-V RVV cross-compilation build (qemu 11) #108: Pull request #1332 synchronize by DiamonDinoia
13m 12s DiamonDinoia:feat/dynamic-masks
DiamonDinoia:feat/dynamic-masks
13m 12s
feat: add runtime batch_bool mask overloads for load_masked/store_masked RISC-V RVV cross-compilation build (qemu 11) #107: Pull request #1332 synchronize by DiamonDinoia
27m 34s DiamonDinoia:feat/dynamic-masks
DiamonDinoia:feat/dynamic-masks
27m 34s