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150 lines (149 loc) · 5.56 KB
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Copy pathSR_to_JK.circ
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150 lines (149 loc) · 5.56 KB
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project source="4.0.0" version="1.0">
This file is intended to be loaded by Logisim-evolution v4.0.0(https://github.com/logisim-evolution/).
<lib desc="#Wiring" name="0">
<tool name="Pin">
<a name="appearance" val="classic"/>
</tool>
</lib>
<lib desc="#Gates" name="1"/>
<lib desc="#Plexers" name="2"/>
<lib desc="#Arithmetic" name="3"/>
<lib desc="#Memory" name="4"/>
<lib desc="#I/O" name="5"/>
<lib desc="#TTL" name="6"/>
<lib desc="#TCL" name="7"/>
<lib desc="#Base" name="8"/>
<lib desc="#BFH-Praktika" name="9"/>
<lib desc="#Input/Output-Extra" name="10"/>
<lib desc="#Soc" name="11"/>
<main name="main"/>
<options>
<a name="gateUndefined" val="ignore"/>
<a name="simlimit" val="1000"/>
<a name="simrand" val="0"/>
</options>
<mappings>
<tool lib="8" map="Button2" name="Poke Tool"/>
<tool lib="8" map="Button3" name="Menu Tool"/>
<tool lib="8" map="Ctrl Button1" name="Menu Tool"/>
</mappings>
<toolbar>
<tool lib="8" name="Poke Tool"/>
<tool lib="8" name="Edit Tool"/>
<tool lib="8" name="Wiring Tool"/>
<tool lib="8" name="Text Tool"/>
<sep/>
<tool lib="0" name="Pin"/>
<tool lib="0" name="Pin">
<a name="facing" val="west"/>
<a name="type" val="output"/>
</tool>
<sep/>
<tool lib="1" name="NOT Gate"/>
<tool lib="1" name="AND Gate"/>
<tool lib="1" name="OR Gate"/>
<tool lib="1" name="XOR Gate"/>
<tool lib="1" name="NAND Gate"/>
<tool lib="1" name="NOR Gate"/>
<sep/>
<tool lib="4" name="D Flip-Flop"/>
<tool lib="4" name="Register"/>
</toolbar>
<circuit name="main">
<a name="appearance" val="logisim_evolution"/>
<a name="circuit" val="main"/>
<a name="circuitnamedboxfixedsize" val="true"/>
<a name="simulationFrequency" val="1.0"/>
<comp lib="0" loc="(380,540)" name="Clock">
<a name="appearance" val="NewPins"/>
</comp>
<comp lib="0" loc="(870,620)" name="Pin">
<a name="appearance" val="NewPins"/>
<a name="facing" val="west"/>
<a name="label" val="Qnext"/>
<a name="type" val="output"/>
</comp>
<comp lib="0" loc="(90,440)" name="Pin">
<a name="appearance" val="classic"/>
</comp>
<comp lib="0" loc="(90,620)" name="Pin">
<a name="appearance" val="classic"/>
</comp>
<comp lib="1" loc="(260,420)" name="NAND Gate"/>
<comp lib="1" loc="(260,640)" name="NAND Gate"/>
<comp lib="1" loc="(390,420)" name="NAND Gate"/>
<comp lib="1" loc="(390,640)" name="NAND Gate"/>
<comp lib="1" loc="(530,440)" name="NAND Gate"/>
<comp lib="1" loc="(530,620)" name="NAND Gate"/>
<comp lib="1" loc="(710,440)" name="NAND Gate"/>
<comp lib="1" loc="(710,620)" name="NAND Gate"/>
<comp lib="5" loc="(880,440)" name="LED">
<a name="label" val="Qn"/>
</comp>
<comp lib="8" loc="(440,673)" name="Text">
<a name="text" val="R"/>
</comp>
<comp lib="8" loc="(444,395)" name="Text">
<a name="text" val="S"/>
</comp>
<comp lib="8" loc="(636,440)" name="Text">
<a name="text" val="!!!"/>
</comp>
<comp lib="8" loc="(82,404)" name="Text">
<a name="text" val="J"/>
</comp>
<comp lib="8" loc="(83,664)" name="Text">
<a name="text" val="K"/>
</comp>
<wire from="(170,350)" to="(170,400)"/>
<wire from="(170,350)" to="(810,350)"/>
<wire from="(170,400)" to="(200,400)"/>
<wire from="(180,660)" to="(180,710)"/>
<wire from="(180,660)" to="(200,660)"/>
<wire from="(180,710)" to="(830,710)"/>
<wire from="(260,420)" to="(310,420)"/>
<wire from="(260,640)" to="(310,640)"/>
<wire from="(310,400)" to="(310,420)"/>
<wire from="(310,400)" to="(330,400)"/>
<wire from="(310,420)" to="(310,440)"/>
<wire from="(310,440)" to="(330,440)"/>
<wire from="(310,620)" to="(310,640)"/>
<wire from="(310,620)" to="(330,620)"/>
<wire from="(310,640)" to="(310,660)"/>
<wire from="(310,660)" to="(330,660)"/>
<wire from="(380,540)" to="(440,540)"/>
<wire from="(390,420)" to="(470,420)"/>
<wire from="(390,640)" to="(470,640)"/>
<wire from="(440,460)" to="(440,540)"/>
<wire from="(440,460)" to="(470,460)"/>
<wire from="(440,540)" to="(440,600)"/>
<wire from="(440,600)" to="(470,600)"/>
<wire from="(530,440)" to="(580,440)"/>
<wire from="(530,620)" to="(590,620)"/>
<wire from="(580,420)" to="(580,440)"/>
<wire from="(580,420)" to="(650,420)"/>
<wire from="(590,620)" to="(590,640)"/>
<wire from="(590,640)" to="(650,640)"/>
<wire from="(620,460)" to="(620,500)"/>
<wire from="(620,460)" to="(650,460)"/>
<wire from="(620,500)" to="(770,500)"/>
<wire from="(620,550)" to="(620,600)"/>
<wire from="(620,550)" to="(790,550)"/>
<wire from="(620,600)" to="(650,600)"/>
<wire from="(650,630)" to="(650,640)"/>
<wire from="(710,440)" to="(790,440)"/>
<wire from="(710,620)" to="(770,620)"/>
<wire from="(770,500)" to="(770,620)"/>
<wire from="(770,620)" to="(810,620)"/>
<wire from="(790,440)" to="(790,550)"/>
<wire from="(790,440)" to="(830,440)"/>
<wire from="(810,350)" to="(810,620)"/>
<wire from="(810,620)" to="(870,620)"/>
<wire from="(830,440)" to="(830,710)"/>
<wire from="(830,440)" to="(880,440)"/>
<wire from="(870,620)" to="(880,620)"/>
<wire from="(90,440)" to="(200,440)"/>
<wire from="(90,620)" to="(200,620)"/>
</circuit>
</project>