[NVBUG-6250866][bugfix] fix DeepEP intranode combine fallback

Signed-off-by: Dongfeng Yu <dongfengy@nvidia.com>

[NVBUG-6250866][bugfix] wire DeepEP patch into FetchContent

Signed-off-by: Dongfeng Yu <dongfengy@nvidia.com>

Author: dongfengy

3rdparty/fetch_content.json

@@ -26,7 +26,8 @@
       "display_name": "deep_ep",
       "git_repository": "${github_base_url}/deepseek-ai/DeepEP",
       "git_tag": "5be51b228a7c82dbdb213ea58e77bffd12b38af8",
-      "use_url": true
+      "use_url": true,
+      "patch_file": "patches/deep_ep_intranode_combine_fix.patch"
     },
     {
       "name": "deepgemm",

3rdparty/patches/deep_ep_intranode_combine_fix.patch

@@ -0,0 +1,29 @@
+--- a/csrc/kernels/intranode.cu
++++ b/csrc/kernels/intranode.cu
+@@ -846,7 +846,9 @@
+                     // Wait TMA arrival
+                     if (lane_id == 0)
+                         tma_store_wait<kNumStages - 1>();
+-                    __syncwarp();
++                    // hidden_int4 is not always divisible by a warp. The final tile can have
++                    // only a subset of lanes active, so synchronize only currently active lanes.
++                    __syncwarp(__activemask());
+
+                     // Write into TMA buffer
+                     auto tma_stage_idx = (i / 32) % kNumStages;
+@@ -855,13 +857,13 @@
+
+                     // Issue TMA
+                     tma_store_fence();
+-                    __syncwarp();
++                    __syncwarp(__activemask());
+                     if (lane_id == 0) {
+                         auto tma_bytes = min(32, hidden_int4 - i) * static_cast<int>(sizeof(int4));
+                         tma_store_1d(reinterpret_cast<int4*>(tma_buffer) + tma_stage_idx * 32,
+                                      recv_int4 + token_idx * hidden_int4 + i, tma_bytes, false);
+                     }
+-                    __syncwarp();
++                    __syncwarp(__activemask());
+ #else
+                     recv_int4[token_idx * hidden_int4 + i] = out_int4;
+ #endif