diff --git a/radio/src/targets/common/arm/stm32/audio_dac_driver.cpp b/radio/src/targets/common/arm/stm32/audio_dac_driver.cpp index 9be32e8b07a..795bf3fc6d5 100644 --- a/radio/src/targets/common/arm/stm32/audio_dac_driver.cpp +++ b/radio/src/targets/common/arm/stm32/audio_dac_driver.cpp @@ -203,10 +203,12 @@ void dacInit() // use TIM6 TRGO as trigger (TSEL1 = TSEL2 = 000) // enable DAC & channel 1 trigger - AUDIO_DAC->CR = DAC_CR_TEN1 | DAC_CR_EN1; + AUDIO_DAC->CR = DAC_CR_TEN1 | DAC_CR_EN1 | DAC_CR_DMAUDRIE1; #endif NVIC_EnableIRQ(AUDIO_DMA_Stream_IRQn); NVIC_SetPriority(AUDIO_DMA_Stream_IRQn, 7); + NVIC_EnableIRQ(AUDIO_TIM_IRQn); + NVIC_SetPriority(AUDIO_TIM_IRQn, 7); } #if defined(AUDIO_MUTE_GPIO) @@ -299,7 +301,7 @@ void audioConsumeCurrentBuffer() AUDIO_DAC->SR = DAC_SR_DMAUDR1; // enable DAC - AUDIO_DAC->CR |= DAC_CR_EN1 | DAC_CR_DMAEN1; + AUDIO_DAC->CR |= DAC_CR_EN1 | DAC_CR_DMAEN1 | DAC_CR_DMAUDRIE1; #endif } else { #if defined(AUDIO_MUTE_GPIO) @@ -325,6 +327,15 @@ void audioEnd() NVIC_DisableIRQ(AUDIO_DMA_Stream_IRQn); } +extern "C" void AUDIO_TIM_IRQHandler() +{ + DEBUG_INTERRUPT(INT_AUDIO); + if (AUDIO_DAC->SR & DAC_SR_DMAUDR1) { + AUDIO_DAC->CR &= ~(DAC_CR_DMAEN1 | DAC_CR_DMAUDRIE1); + AUDIO_DAC->SR = DAC_SR_DMAUDR1; + } +} + extern "C" void AUDIO_DMA_Stream_IRQHandler() { #if defined(STM32H5) || defined(STM32H7) || defined(STM32H7RS) diff --git a/radio/src/targets/common/arm/stm32/spi_flash.cpp b/radio/src/targets/common/arm/stm32/spi_flash.cpp index c14a6532580..abe1d8b81eb 100644 --- a/radio/src/targets/common/arm/stm32/spi_flash.cpp +++ b/radio/src/targets/common/arm/stm32/spi_flash.cpp @@ -24,6 +24,9 @@ #include "stm32_gpio.h" #include "hal.h" +#if !defined(BOOT) +#include "rtos.h" +#endif #define CS_HIGH() stm32_spi_unselect(&_flash_spi) #define CS_LOW() stm32_spi_select(&_flash_spi) @@ -147,6 +150,13 @@ static void flash_wait_for_not_busy() uint8_t status; do { flash_do_cmd(FLASH_CMD_STATUS, 0, &status, 1); + if (status & 0x01) { +#if !defined(BOOT) + RTOS_WAIT_MS(1); +#else + delay_ms(1); +#endif + } } while (status & 0x01); }